A Low Overhead Reverse Converter for Fault tolerant RNS

Even though it has been shown that residue number systems (RNS) provide very fast and reliable arithmetic due to its inherent parallel processing and error correcting capabilities, its use is severely limited to a few applications due to the complexities involved in its conversion circuitry. Moreover, the detection of errors and their correction form an important aspect of any digital design. In this regard, here a CRT based reverse converter for fault tolerant RNS is presented. We propose two architectures, the first one generates the corrected residue number and the second one decodes binary number from its erroneous residue input. Furthermore, it can be shown that if one of the moduli is an integer power of 2 (of the form 2), the hardware requirement for reverse conversion can still be reduced compared to previous techniques. The proposed approach uses less hardware compared to conventional designs.